Moderator: Tsung-Yi Ho
Zoom link: https://acm-org.zoom.us/j/93272363919?pwd=aGZDNnkzeFh2dk1sYzRuTjZud2ZYQT09
Talk 1: The Challenges of Automating the Design Flow of Superconducting Electronic Circuits
Abstract: TBD
Authors: Jamil Kawa, Synopsys
Speaker bio: Mr. Jamil Kawa (Synopsys Fellow, Solutions Group). Jamil is a Synopsys Fellow in the Solutions Group at Synopsys working on advanced nodes technology development and IP architectures. He is the Co-PI of the IARPA sponsored Synopsys SuperTools for Enablement of Superconducting Electronics. Before that, he was Group Director of R&D of the Implementation Group of Synopsys overseeing projects in 3-D IC and SIP design. He has been with Synopsys since 1998 where he originally managed the Memory Compiler and IO design groups before joining the Advanced Technology Group (ATG) where he worked on DFM / DFY, 3-T SRAM technology, corrugated substrate technology (for FinFET manufacturing), low power design, and Structured ASICs research. Jamil holds over 30 patents in the areas of circuits, nano-wire devices, device reliability 3D-IC, and design architecture. He has authored over 20 papers and articles, and co-authored the book Design for Manufacturability and Yield for Nano-scale CMOS published by Springer in 2007.
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Talk 2: AQFP Superconducting-based Deep Learning Acceleration
Abstract: TBD
Authors: Yanzhi Wang, NEU
Speaker bio: Yanzhi Wang is currently an assistant professor at Dept. of ECE at Northeastern University, Boston, MA. He received the B.S. degree from Tsinghua University in 2009, and Ph.D. degree from the University of Southern California in 2014. His research interests focus on model compression and platform-specific acceleration of deep learning applications. His research maintains the highest model compression rates on representative DNNs since 09/2018. His work on AQFP superconducting based DNN acceleration is by far the highest energy efficiency among all hardware devices. His recent research achievement, CoCoPIE, can achieve real-time performance on almost all deep learning applications using off-the-shelf mobile devices. His work has been published broadly in top conference and journal venues (e.g., ASPLOS, ISCA, MICRO, HPCA, PLDI, ICS, ISSCC, AAAI, ICML, CVPR, ICLR, IJCAI, ECCV, ICDM, ACM MM, DAC, ICCAD, FPGA, LCTES, CCS, VLDB, ICDCS, Infocom, TComputer, TCAD, JSAC, TNNLS, etc.), and has been cited around 7,000 times. He has received four Best Paper Awards, has another ten Best Paper Nominations and four Popular Paper Awards. He has received the U.S. Army Young Investigator Award (YIP), Massachusetts Acorn Innovation Award, and other research awards from Google, MathWorks, etc. He is a senior member of IEEE. Three of his former Ph.D./postdoc students become tenure track faculty at Univ. of Connecticut, Clemson University, and Texas A&M University, Corpse Christi.
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Talk 3: Energy-Efficient Superconductor Digital Circuit Technology for High-Performance Computing
Abstract: TBD
Authors: Nobuyuki Yoshikawa, YNU
Speaker bio: Nobuyuki Yoshikawa received Ph.D. degrees in electrical and computer engineering from Yokohama National University, Japan in 1989. Currently, he is a professor of the Department of Electrical and Computer Engineering, Yokohama National University. He is also a chair of the Superconducting Electronics Committee of the Japan Society for the Promotion of Science (JSPS) and the Technical Committee on Metal and Ceramics of the Institute of Electrical Engineering of Japan. His research interests include superconductive devices and their application in digital and analog circuits. He is also interested in quantum computing devices and cryo-CMOS devices. He has led the Superconductivity Electronics Group at Yokohama National University. He is an expert in the field of superconductivity electronics and the foremost active researcher of superconducting logic. He has published more than sixty articles on single-flux-quantum (SFQ) and adiabatic quantum flux parametron (AQFP) circuits or closely related topics in the past five years alone.
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